WIP to fix timing on newer nightlies-
All bits seem to register here, but with zeroes reliably becoming ones in a way that desaturates things towards white
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1 changed files with 44 additions and 7 deletions
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@ -1,4 +1,5 @@
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#![no_std]
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#![feature(asm)]
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extern crate cortex_m;
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extern crate embedded_hal;
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@ -9,6 +10,7 @@ pub use cortex_m::asm::delay;
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pub use hal::entry;
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use core::fmt::Debug;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::u8;
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pub use embedded_hal::digital::v2::OutputPin;
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use hal::{clock::GenericClockController, pac::Peripherals};
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@ -67,14 +69,42 @@ where
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{
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#[inline]
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pub fn write(&mut self, bit: bool) {
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// go high
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self.high_out.set_high().unwrap();
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delay(if bit {
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ONE_HIGH_CYCLES
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} else {
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ZERO_HIGH_CYCLES
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});
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unsafe {
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compiler_fence(Ordering::SeqCst);
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asm!(
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// ? nops
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"nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;",
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);
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compiler_fence(Ordering::SeqCst);
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}
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if bit {
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unsafe {
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compiler_fence(Ordering::SeqCst);
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asm!(
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// 7 nops
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"nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;",
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"nop;", "nop;", "nop;", "nop;",
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);
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compiler_fence(Ordering::SeqCst);
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}
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}
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// go low
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self.high_out.set_low().unwrap();
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delay(if bit { ONE_LOW_CYCLES } else { ZERO_LOW_CYCLES });
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unsafe {
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compiler_fence(Ordering::SeqCst);
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asm!(
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// 2 nops
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"nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;", "nop;",
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"nop;", "nop;", "nop;", "nop;", "nop;",
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);
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compiler_fence(Ordering::SeqCst);
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}
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}
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#[inline]
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@ -87,7 +117,14 @@ where
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self.write(byte & 0x04 != 0);
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self.write(byte & 0x02 != 0);
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self.write(byte & 0x01 != 0);
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delay(5);
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unsafe {
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compiler_fence(Ordering::SeqCst);
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asm!(
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// 5 nops
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"nop;", "nop;", "nop;", "nop;", "nop;",
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);
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compiler_fence(Ordering::SeqCst);
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}
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}
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/// Blink light, probably to indicate a loop is still running
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